SoC Solutions | SPG101 SDHC | Evaluation Board

Key ASIC SPG101 SoC Chip Evaluation Board

 

Summary

Powered by unique ASIC approach, KeyASIC’s leading edge 32bits CPU SOC reference platform is an ideal engineering tool to develop a “combo” SD card which can integrate one SDIO plus one SD memory functions into a regular SD form factor card solution.

Features

Microprocessor and General Architecture

  • High performance 32bits CPU core with clock rate of 200MHz
  • Interrupt Controller
  • Internal AMBA (Advanced Microcontroller Bus Architecture) (AMBA2.0, AHB/APB)
  • DMA Controller to manage accesses to external memory
  • JTAG support for debug

Memory Subsystem

  • SDRAM Controller for 64MB external SDRAM, supporting 16-bit SDRAM interface for single-chip SDRAM implementation at 166MHz
  • Auto-load Flash Controller for external NOR Flash – can support up to 32MBytes of NOR Flash
  • SSI interface can program to NOR-Flash control for software to read/write NOR-Flash.

SD Interface

  • One SD2.0/SDHC card interface for SD, mini SD and micro SD card
  • One SDIO Host
  • One SD Slave

General Peripherals

  • Pulse Width Modulation (PWM) / Timer: for control the buzzer.
  • 8 GPIO ports
  • Watch Dog Timer

Serial Interfaces

  • Universal Asynchronous Receiver/Transmitter (UART)
  • Serial Synchronous Interface(SSI)

System Management

  • Little Endian format support
  • System operating clock generation
  • Power management

BSP

  • OS: Linux 2.6.32
  • Driver: SD2.0 Device, SDIO Host, SDHC Host

Operational Condition

  • IO Voltage: 2.7 ~ 3.3V, Compliant with SD card Supply Voltage Specification
  • Operation Temperature: -40 ~ +85 ℃